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ASIC Package Design Engineer

ASIC Package Design Engineer

NPA WorldwideLa Gran YajaMilpitas, California, United States
22 days ago
Job type
  • Full-time
Job description

Description

Our customer is an innovative enterprise that designs, develops, and delivers System-on-Chip solutions for customers worldwide. The company focuses on AR / VR, ADAS, imaging, networking, data storage, and other dynamic technologies that drive today’s leading-edge applications. They combine world-class expertise, experience, and an extensive IP portfolio to provide exceptional solutions and ensure a better quality of experience for customers. Founded in 2015, they are headquartered in Yokohama, and have offices in Japan, Asia, the United States, and Europe to lead their product development and sales activities.

We are seeking an ASIC Package Design Engineer to work from our Milpitas, CA office in a hybrid capacity.

Responsibilities

The Package Engineering function provides support, expertise, and insight to the Silicon device development team through preliminary activities of package selection, routing techniques, and necessary simulation work. The position involves diverse responsibilities, including evaluation of new packaging technology, package recommendation for custom devices, substrate design support, and device / package qualification. You will report to the Director of Package design (USA), and you will also work very closely with the Package / Manufacturing team in our headquarters (Japan), and the Marketing and Engineering teams located in our Santa Clara office during the pre- and post-sales process.

  • This position requires experience in the Fabless semiconductor model with a broad knowledge of package technology and manufacturing. Successful candidates will have a deep understanding of a variety of IC package technologies.
  • The candidate should possess specific experience in the following areas :
  • High-performance build-up substrates,
  • Flip chip assembly or 2.5D packaging.
  • Knowledge of Chiplet technology
  • Optical integrated packages
  • Experience in extracting / simulating package designs for SI and PI using tools such as HFSS, POWER SI, and other leading tools.

Education

Bachelor’s degree in Electrical Engineering, or other semiconductor packaging-related discipline

Required Experience & Skills

  • 8 to 10 years of experience in semiconductor packaging design and simulations
  • Record of success in a cross-functional team environment
  • Good experience with SI / PI tools for package-level extraction / simulation
  • Ability to work with Package Layout engineers
  • Strong presentation and communication skills
  • Preferred Experience & Skills

    Good knowledge of IC package materials and manufacturing

    Compensation : $180,000 - 220,000 base salary DOE, plus an excellent benefits package.

    Applicants must be authorized to work for any U.S. employer.

    Staff Smart, Inc. is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, genetic information, disability status, or any other characteristic protected by law.

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    Asic Design Engineer • La Gran YajaMilpitas, California, United States