Sr. Principal EDA Software Engineer (C++, Characterization)

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• At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
• At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets.
• Must haves :
• Requirements :
• Experience with quality and software processes
• Proficiency designing data structures, algorithms, and software engineering principles
• Proficiency in analyzing transistor or gate level schematics
• The preferred candidate is expected to have a BS in CS / EE / CE
• Nice to haves :
• Experience in development of circuit simulation or library characterization programs
• High level understanding of SPICE simulation transistor models
• Experience with distributed programming, database design, and cloud APIs for distributed computing
• Your work will be focused on :
• Enhancing and expanding the existing tools' architecture to cover timing analysis
• Creating new frameworks for analysis of effects dominant at n5 and below
• Using machine learning technology to bring order of magnitude speed / capacity / usability improvements over existing solutions
• The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation : bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include : paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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• We’re doing work that matters. Help us solve what others can’t.
• 8+ years of experience in development of EDA tools and one or more of transistor level timing, power, noise, aging, reliability, and emir analysis
• Hardcore C++ Knowledge – Linux
• Proficiency designing data structures, algorithms, and software engineering principles
• Industry experience developing and maintaining C++ based applications on a Unix or Linux environment
• Equal Employment Opportunity Policy :
• Cadence is committed to equal employment opportunity throughout all levels of the organization.We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com.
• Privacy Policy :
• Job Applicant If you are a job seeker creating a profile using our careers website, please see the .E-Verify Cadence participates in theE-Verify program in certain U.S. locations as required by law.Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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