Position : Hardware Engineer
Duration : 12+ Months Contract
Location : San Jose, CA (5 days onsite)
Experience : 7+ years (Relevant)
What candidate will Be Doing :
Technical :
- Cadence Z2 (Palladium) and / or Synopsys HAPS-100 Emulation expertise
- Learn / understand the testbench architecture
- Strong in Design Functional Verification (SV / UVM)
- Software (Test) and Hardware (Emulation) Validation
What we are looking for :
At-least 2+ years of experience in emulation (Cadence Palldium, Synopys HAPS)At-least 2+ year of experience in SV / UVM.Experience in complete verification cycle which includes development of test plan, BFM / Driver / Monitor / Scoreboard component development and integration in test bench, stress / corner testing, failure debug, gate level simulations, assertions, and coverage closure.Proficient in SVTB / UVM, C++ testbench along with emulation