A leading automotive technology company is seeking a Senior ASIC RTL Design Engineer in Palo Alto, CA to implement high-quality designs for AI accelerators. The role involves microarchitecture specification, cross-functional team collaboration, and demands an electrical engineering degree along with 5+ years of experience. Competitive compensation includes a salary of $120,000 - $264,000 plus benefits and stock awards.
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Asic Design Engineer • Palo Alto, CA, United States