A leading technology company in San Francisco is seeking an Analog Mixed Signal IP Silicon Validation Engineer to lead the characterization and validation of high-speed SerDes blocks. Candidates should have a B.S. degree and over three years of experience, particularly with SerDes architectures. The role includes analyzing performance, debugging components, and collaborating with multi-functional teams. Competitive salary and comprehensive benefits offered.
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Validation Engineer • San Francisco, CA, United States