A company is looking for a Senior Staff Verification Engineer. Key Responsibilities Verify Display port / eDP, protocol, and supporting circuitry Develop test benches from scratch and optimize existing ones Support chip bring-up and validation teams Required Qualifications Bachelor's degree in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience, or a Master's / PhD with 3-5 years of experience Proficient in digital logic design concepts Strong verification knowledge with SystemVerilog and UVM Understanding of Display Port / eDP and MIPI protocols and PHYs Experience in Perl / Python / Tcl is a plus
Verification Engineer • Garland, Texas, United States