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Senior Design Verification Engineer - Digital Design Verification - High-Speed Communication Protocols - VLSI - Austin
We are partnered with an exciting startup that is creating innovative technology for the optical communications industry as they look to build a new verification function in the US.
If you are experienced within digital design verification engineering and looking for a new challenge in a dynamic, fast-paced environment, then I want to speak with you!
Role : Senior Design Verification Engineer
Salary : Competitive base salary + equity options
Location : Austin,TX
The skills needed for the role include :
- 6 plus years' experience working within digital design verification positions.
- Extensive knowledge of VLSI verification flows, concepts and methodologies.
- Successfully completed two or more full block / system verification cycles through to tape-out.
- Expert in industry standard verification methodologies - UVM, SystemVerilog.
- Experienced with high-speed communication protocols - Ethernet, SerDes, PCIe.
- Knowledge / experience of one of the verification methodologies (UVM, OVM, eRM).
- Driven, enthusiastic individual that is ready for a new challenge, in a fast-paced, dynamic environment that will have a profound impact on the future of optical communication technology.
If you are interested in the Senior Design Verification Engineer opportunity, apply directly to this advert for immediate consideration.
Alternatively, please contact Jacob Pudifoot at [email protected] for further details!