TetraMem is a fast-growing well-funded startup company working on the next generation of computing platforms with unique ReRAM-based in-memory computing technologies.
We are hiring in multiple posit...Show moreLast updated: 15 days ago
ASIC / RTL Design
MediabistroFremont, CA, United States
$78.57 hourly
Full-time
ASIC / RTL Design EngineerLocation : .San Jose California - OnsiteInterviews : .Top skills : RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTim...Show moreLast updated: 4 days ago
Promoted
onsite-ASIC RTL / SoC Design (exp in RTL / SoC / digital design) Engineer
Jobspro StaffingNewark, CA, US
Full-time
ASIC RTL / SoC Design(exp in RTL / SoC / digital design) Engineer.CA Lead RTL design (5+ yrs exp) , simulation, and verification efforts for ASIC / SoC products, ensuring robust and efficient designs.Integ...Show moreLast updated: 2 days ago
Promoted
ASIC Package Design Engineer
Socionext USMilpitas, CA, United States
Full-time
Senior Engineer, Package Design Milpitas, CA.SNI) is an innovative enterprise that designs, develop and deliver System-on-Chip solutions to customers worldwide.
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ASIC / RTL Design
TPI Global SolutionsHayward, CA, United States
$78.57 hourly
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RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime).The work will expose the designer to a number of IP including ARM cores, Ethernet,...Show moreLast updated: 19 days ago
ASIC Engineer Sr Staff
Juniper NetworksCA, United States
$179,200.00–$257,600.00 yearly
At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known.
To achieve real outcomes, we know that experience is t...Show moreLast updated: 30+ days ago
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ASIC Design Engineer
DBSI Services, Inc.Milpitas, CA, United States
$180,000.00–$220,000.00 yearly
Full-time
Front-End ASIC Design Engineer.Responsibilities Include but are not Limited to : .Ensure designs meet product Performance-Power-Area-Schedule requirements.
Tasks may include Architecture / micro-Archi...Show moreLast updated: 4 days ago
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Senior ASIC Design Engineer
Tarana WirelessMilpitas, CA, US
$130,000.00–$210,000.00 yearly
Full-time
This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products.
Architecture and micro-architecture of digital subsystems....Show moreLast updated: 2 days ago
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Design Engineer
VirtualVocationsFremont, California, United States
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A company is looking for a Design Engineer, Product Design.Key Responsibilities : Design reusable components and patterns, conduct usability testing, and maintain design system code repositoriesColla...Show moreLast updated: 8 days ago
Promoted
ASIC / SoC Design Verification Engineer
PER Internationalfremont, CA, United States
Full-time
We are partnering with a high-growth startup at the forefront of semiconductor innovation.This company is redefining edge AI computing with cutting-edge technology and a highly talented team.Backed...Show moreLast updated: 5 days ago
If you have SoC / ASIC experience working hands-on with non-off the shelf designs, this is the job for you!.Support customer’s design through all phases of ASIC execution at Company.Ensure designs me...Show moreLast updated: 22 days ago
Promoted
Senior ASIC Design Engineer
Tarana Wireless IncMilpitas, CA, United States
$130,000.00–$210,000.00 yearly
This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products.
Architecture and micro-architecture of digital subsystems....Show moreLast updated: 30+ days ago
Promoted
Design Engineer
BKF EngineersPleasanton, CA, United States
$76,000.00–$93,000.00 yearly
Full-time
We are hiring Design Engineers to work out of our Bay Area Offices!.We are looking for Transportation Design Engineers who can apply standard engineering techniques, procedures, and criteria using ...Show moreLast updated: 4 days ago
ASIC RTL / SoC Design Engineer
Johnson Service GroupFremont, CA, US
$150,000.00–$250,000.00 yearly
Full-time +1
Quick Apply
JSG is seeking a highly skilled.The role will involve collaborating with multiple teams to optimize the performance and functionality of designs, integrating IP blocks, and supporting post-sil...Show moreLast updated: 5 days ago
ASIC / SoC Design Verification Engineer
IntelliPro Group Inc.Fremont, CA, US
$110,000.00 yearly
Quick Apply
Job Title : ASIC / SoC Design Verification Engineer Position Type : Full-Time / On-Site Location : Fremont, CA Salary Range / Rate : $110,000 - $300,000 Job ID# : 136685 Year of Experien...Show moreLast updated: 30+ days ago
Promoted
ASIC DV Engineer Hardware
Palo Alto NetworksSanta Clara County, California, USA
$101,000.00–$164,000.00 yearly
As a Design Verification engineer on the ASIC team you will ensure that the ASICs in our groundbreaking nextgeneration firewall products meet or exceed industryleading requirements for features per...Show moreLast updated: 22 days ago
Promoted
ASIC Front End Implementation Engineer
Sintegra Inc.Hayward, CA, United States
Full-time
As a Front-End Implementation Engineer, you will be responsible for ensuring the successful design and implementation of semiconductor circuits with a focus on CDC / RDC.
You will work closely with cr...Show moreLast updated: 22 days ago
TetraMem - Accelerate The WorldFremont, CA, United States
$110,000.00–$250,000.00 yearly
Full-time
TetraMem is a fast-growing venture-backed well-funded startup company working on the next generation computing platforms with unique ReRAM-based in-memory computing technologies.We are hiring in mu...Show moreLast updated: 22 days ago
Promoted
ASIC AUTOMATION AND INTEGRATION ENGINEER
Broadcom, Inc.CA, United States
$107,000.00–$171,000.00 yearly
Full-time
If you are a first time user, please create your candidate login account before you apply for a job.If you already have a Candidate Account, please Sign-In before you apply.Would you like to concei...Show moreLast updated: 1 day ago
TetraMem is a fast-growing well-funded startup company working on the next generation of computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions from software to hardware.
We offer a very competitive compensation, commensurate with experience, and a full benefits package including medical, professional PTO, 401k, and other perks.
Job Description
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
Build and maintain infrastructure / environment for automation verification of SoC architecture, function and performance.
Develop reusable testbench, constrained-random / directed testcases, and verification associated behavioral module for both of block levels and system levels.
Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out.
Work with design engineers to debug and identify root causes of simulation failure.
Support test engineers for post-silicon validation.
Mentor and coach team members and junior engineers. Drive verification efficiency.
Qualifications
MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree.
In depth knowledge of UVM / OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology.
Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function / performance verification.
Proficient experience with Verilog, System Verilog, Python / Perl / TCL / Shell scripting, C / C++, System C and industry mainstream ISAs assembly coding.
Familiarity with MIPI, AMBA (APB / AHB / AXI) bus protocol, RISC-V / ARM or DSP core.
Experience in verifying designs at both of RTL level and post-P&R gate level.
Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus :
Working knowledge of AI / ML Computing, GPU, ISP architectures and accelerators
Experience in verifying mix-signal design and interface of digital and analog.
Experience of design verification for high speed IO such as PCIE and DDR.
Additional Information
All your information will be kept confidential according to EEO guidelines.