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Verification engineer • sunnyvale ca
Verification Engineer
Eridu AISaratoga, CA, United States- Promoted
Design Verification Engineer
eInfochips (An Arrow Company)Mountain View, California, US- Promoted
PRINCIPAL VERIFICATION ENGINEER
Cypress HCMSan Jose, CA, United StatesFormal Verification Engineer
AppleCupertino, CA, United StatesVerification Engineer
Celestial AISan Jose, CA, United StatesASIC Verification Engineer
Yoh, A Day & Zimmermann CompanySan Jose, CaliforniaFormal Verification Engineer
NVIDIASanta Clara, CA, USVerification Engineer IV 60987-1
Infotech SourcingSunnyvale, CA, United States- Promoted
SOFTWARE ENGINEER
BayasystemsSanta Clara, CA, United StatesVerification Engineer
Sunrise SystemsSanta Clara, CA, US- Promoted
Founding Engineer
Acceler8 TalentSan Jose, CA, United States- Promoted
- New!
DIGITAL VERIFICATION ENGINEER
Ethan Alexander Group, Inc.Campbell, CA, United States- Promoted
Design Verification Engineer
TalentBridgeMenlo Park, CA, United StatesVerification Engineer
NatcastSan Jose, CA, United States- New!
Sr Design Verification Engineer
IntelSanta Clara, CA, United StatesPrincipal Verification Engineer
RambusSan Jose, CA, US- Promoted
Verification Engineer IV
Pyramid Consulting, IncSan Jose, CA, US- Promoted
ASIC Verification Engineer
CiscoSan Jose, CA, United States- Promoted
Principal Verification Engineer
OSI EngineeringSan Jose, CA, USDesign Verification Engineer
The Fountain GroupSanta Clara, CA- dentist (from $ 183,150 to $ 250,000 year)
- general dentist (from $ 230,000 to $ 250,000 year)
- technical director (from $ 102,500 to $ 243,250 year)
- digital artist (from $ 190,783 to $ 243,100 year)
- medical director (from $ 172,500 to $ 242,000 year)
- computer engineer (from $ 148,200 to $ 241,000 year)
- database engineer (from $ 100,425 to $ 240,000 year)
- engineering director (from $ 187,500 to $ 240,000 year)
- product director (from $ 180,000 to $ 238,642 year)
- embedded systems engineer (from $ 163,500 to $ 234,000 year)
- Palm Bay, FL (from $ 153,813 to $ 224,450 year)
- Spokane Valley, WA (from $ 145,486 to $ 217,750 year)
- Berkeley, CA (from $ 92,625 to $ 205,000 year)
- Seattle, WA (from $ 112,500 to $ 201,928 year)
- San Diego, CA (from $ 138,612 to $ 200,428 year)
- Dallas, TX (from $ 73,840 to $ 196,750 year)
- Boston, MA (from $ 109,850 to $ 196,750 year)
- Los Angeles, CA (from $ 116,189 to $ 192,878 year)
- Washington, DC (from $ 110,778 to $ 192,200 year)
- College Station, TX (from $ 123,000 to $ 190,500 year)
The average salary range is between $ 114,126 and $ 191,048 year , with the average salary hovering around $ 145,794 year .
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Verification Engineer
Eridu AISaratoga, CA, United States- Full-time
About Eridu AI
Eridu AI is a Silicon Valley hardware startup focused on accelerating training and inference performance for large AI models. Today's AI model performance is often gated by infrastructure bottlenecks. Eridu AI introduces multiple industry-first innovations across semiconductors, software and systems to deliver solutions that improves AI data center performance to increase GPU utilization while simultaneously reducing capex and power. Eridu AI's solution and value proposition have been widely validated with several hyperscalers.
The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ : INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World's leading micro-LED display company and developer of the first augmented reality contact lens).
Key Responsibilities
- Specialized Verification Strategy : Develop verification infrastructure and test cases for ASICs in the area of network fabrics, leveraging your extensive experience in networking.
- Technical Expertise in ASIC Verification : Provide technical leadership in the verification of complex ASIC designs, ensuring compliance with industry standards and project specifications Gate & Timing simulations : collaborate with the team to execute comprehensive gate-level simulations, including timing and power analysis, to validate the ASIC design before tape-out.
- RTL Coverage Analysis : deliver detailed coverage metrics to assess the thoroughness of the test suite. Offer actionable feedback to design engineers, focusing on identifying gaps and suggesting enhancements to elevate test effectiveness and broaden coverage scope.
- Quality Assurance and Process Optimization : Uphold the highest standards of verification quality. Initiate and implement process improvements for increased efficiency and effectiveness.
Qualifications
Why Join Us?
At Eridu AI, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
The pay range for this role is :
195,000 - 280,000 USD per year (San Francisco Bay Area)