Senior FPGA Design Engineer

Overview

Tarana is seeking exceptional FPGA engineers to join the FPGA Design Team. You will contribute to the development and testing of advanced FPGAs powering our next-gen wireless base stations and ASIC emulation platforms, playing a vital role in building the foundation of tomorrow’s wireless infrastructure.

What You’ll Do

• Design, implement, and debug logic for large FPGAs
• Simulate, test, and validate logic at both module and system levels
• Participate in system-level integration and troubleshooting
• Collaborate across hardware and software teams for smooth integration
• Create and maintain design documentation and review test outcomes

What You'll Need

Bonus Points For

What we offer

We don’t just build next-gen wireless technology — we build people. The salary range for this position is : $130,000 to 175,000. Compensation will be determined based on factors including skill set, years of experience, and geographic location. Tarana provides competitive benefits to employees in this role including : Medical, dental and vision benefits, 401K match, flexible time off and stock option.

About Us

Tarana’s mission is to accelerate the deployment of fast, affordable internet access around the world. Through a decade of R&D and more than $400M of investment, the Tarana team has created a unique next-generation fixed wireless access (ngFWA) technology instantiated in its first commercial platform, Gigabit 1 (G1). It delivers a game-changing advance in broadband economics in both mainstream and underserved markets, using either licensed or unlicensed spectrum. G1 started production in mid-2021 and has since been embraced by more than 250 service providers in 19 countries and 41 US states. Tarana is headquartered in Milpitas, California, with additional R&D in Pune, India.

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