ASIC Power Engineer V

Job Title : ASIC Power Engineer

Contract Duration : 6 months, possible extension

Location : Sunnyvale, CA

Work Arrangement : Hybrid

Summary ASIC Power Engineer to perform power analysis and optimizations in ASIC for Meta’s AR / VR products. Areas of interests includes Machine Learning. Primary languages are Python, tcl and SystemVerilog.

Responsibilities

• Perform PPA optimization with Fusion compiler.
• Perform RTL and netlist level Power analysis
• Perform post-processing and scripting on report log files for format conversion, data analysis and information extraction
• Setup, run, debug and analyze reports of ASIC flows (Synthesis, PD, Power, Timing)
• Implement some blocks at RTL and UPF
• Ability to document and communicate clearly

Minimum Qualifications

Preferred Qualifications

Must Have Skills

Nice to Have Skills

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