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Staff Engineer- FPGA RTL Developer
Staff Engineer- FPGA RTL DeveloperPivot + Edge • Dallas, TX, United States
Staff Engineer- FPGA RTL Developer

Staff Engineer- FPGA RTL Developer

Pivot + Edge • Dallas, TX, United States
9 hours ago
Job type
  • Full-time
Job description

About Macnica :

Macnica Americas, Inc. is the North American division of Macnica Fuji Electronics Holdings, Inc. a $10 billion technology solutions provider with a stronghold in semiconductor distribution. Macnica excels in customizing solutions to client requirements and leveraging skilled engineers to expedite product development without compromising outcomes for our clients.

Company perks :

  • 15 days of vacation, plus 12 days of national holidays
  • 40 hrs. of paid sick time off
  • Health, dental, and vision insurance
  • 401 (k) with company matching
  • HSA / FSA

Job Summary :

We are seeking an experienced Senior RTL Engineer to join our hardware design team. This role requires a strong foundation in Verilog / SystemVerilog and C / C++ programming, with extensive experience in FPGA design, simulation, and optimization. The ideal candidate will be skilled in static timing analysis, FPGA constraints, and embedded system development within a Linux-based design environment. As a Senior RTL Engineer, you will work closely with cross-functional teams to develop, test, and optimize FPGA and SoC-based solutions for high-performance applications.

Responsibilities :

  • Develop RTL designs using Verilog and SystemVerilog for complex digital systems.
  • Write and integrate embedded software in C or C++ for hardware interaction, testing, and debugging.
  • Collaborate with software and firmware teams to ensure seamless integration of hardware and software components.
  • Constrain FPGAs for static timing analysis and optimize FPGA builds for performance, resource usage, and power efficiency.
  • Conduct RTL simulations to verify functionality, reliability, and timing.
  • Collaborate with cross-functional teams, including hardware, software, and QA, to ensure project success.
  • Requirements :

  • Ability to travel up to 10%
  • At least 8+ years of developing RTL designs using Verilog and SystemVerilog for complex digital systems.
  • 5+ years of experience with C or C++ programming, preferably in embedded systems.
  • Experience with video FPGA designs and video baseband interfaces such as SDI and HDMI.
  • Proficiency in RTL simulation and verification methodologies.
  • Strong debugging skills for both software and hardware.
  • Experience with FPGA constraint setup, static timing analysis, and optimizing FPGA builds.
  • Proficiency with Linux-based design environments.
  • Design experience with FPGA-based SoCs.
  • Knowledge of Ethernet or packet-based networking designs for FPGA or ASIC implementations, with a deep understanding of Ethernet and IP packet processing.
  • Domain knowledge and development experience in Pro-AV / Broadcast or Imaging solutions is a plus
  • Education :

  • Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related field.
  • Minimum 8 years of hands-on experience.
  • Compensation :

  • Pay : $113K - $165K per year, commensurate with experience and qualifications.
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