MTS IO Design Architect, HBM

Our vision is to transform how the world uses information to enrich life for all .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The High-Performance Integrated Group (HIG) within the Technology and Products Group (TPG) develops and optimizes High Bandwidth Memory (HBM) solutions for AI and ML applications. Our mission is to deliver the lowest power per bit solutions in the industry.

We are looking for an HBM IO Architecture Design engineer own the development of the PHY IO on the interface die in HBM products. In this position, you will be responsible for the development including defining design target, developing spec, architecting IO / clocking / datapath, being responsible for design, optimization, and verification. Use of both analog and digital CMOS design skills will be needed to work on the various circuits you would be responsible for. You will be part of a highly multi-functional team of technical domain experts collaborating closely with a distributed team of Design Engineering, Product Engineering, Process Development, Package Engineering & Business Units to implement a common goal of ensuring our future HBM roadmap is successful.

Responsibilities

Define design targets and develop specifications for IO architecture

Architect IO, clocking, and datapath for HBM products

Plan IO development for next-generation products

Collaborate with Product Engineering to correlate silicon measurements and simulations

Ensure design quality through engagement with Standards, CAD, modeling, and verification teams

Drive innovation for future memory generations

Contribute to cross-group communication for standardization and success

Perform optimization and verification of IO circuits

Requirements

MS or PhD in Electrical Engineering

Minimum 10+ years of relevant engineering or design experience

Expertise in high-speed clocking design at 16Gbps+

Strong knowledge of IO design principles and trade-offs (speed, area, power, complexity)

Familiarity with off-chip protocols (UCIe, HBM, DDR, PCIe, MIPI, etc.)

Preferred Qualifications

Hands-on experience with FinFET device characteristics

Prior circuit debug experience through Product Engineering or equivalent

Deep understanding of signal integrity, channel characteristics, and ESD design techniques

Job title and level can scale depending on experience and qualifications

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com / careers / benefits .

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