Job Description
Job Description
Sr. ASIC RTL Design Engineer
Job Title : Sr. ASIC RTL Design Engineer
Job Location : San Jose, CA or Irvine, CA
Compensation : $150K - $250K base DOE plus equity
Requirements : Logic Design, RTL, Processor Architecture, Memory, Cache Subsystems, NoC, Interconnects
Position Overview
We are seeking a highly skilled Sr. ASIC RTL Design Engineer to join our innovative team. The ideal candidate will be responsible for designing and implementing complex ASIC designs, focusing on RTL development and ensuring high performance and efficiency in our next-generation products.
Key Responsibilities
Qualifications
Benefits
CyberCoders is proud to be an Equal Opportunity Employer
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. Individuals needing special assistance or an accommodation while seeking employment can contact a member of our Human Resources team at Benefits@CyberCoders.com to make arrangements.
Asic Design Engineer • Irvine, CA, US