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Principal Reliability Engineer

Principal Reliability Engineer

OSI EngineeringSan Jose, CA, US
1 day ago
Job type
  • Full-time
Job description

A premier chip and silicon IP provider is seeking a Principal Reliability Engineer to join our Operations team in San Jose. In this role, you will collaborate with some of the brightest inventors and engineers in the world to develop products that make data faster and safer. Responsibilities : Own end-to-end reliability tasks (plan, design, test, analysis, report) and demonstrate strong initiative for New Product Introduction (NPI). Conduct risk assessment for Design, Process, Packaging, and Test Flow changes and provide qualifications for changes. Drive failure analysis to root causes and implement corrective actions through collaboration with cross-functional teams including Design, Validation, Packaging, PE / TE, etc. Define ongoing reliability monitoring for production. Collaborate with foundries and package houses (OSATs) to assess, characterize, and improve product quality and reliability. Review and interpret reliability test results, make engineering judgments, and drive appropriate actions. Required Qualifications : M.S. / Ph.D. in Electrical Engineering, Physics, Material Science, or equivalent experience. Experience in semiconductor IC quality & reliability, validation, PE / TE, or relevant fields, and familiarity with JEDEC qualification standards. Experience with semiconductor failure models, mechanisms, and failure analysis techniques. Strong background in root cause analysis and implementing corrective actions to resolve quality or reliability issues. Excellent interpersonal and written communication skills to interact with suppliers, customers, and internal teams. Preferred Skillset / Key Focus Areas : Experience with SoC (System-on-Chip), true silicon chips (ASIC, FBGA, CPU) is highly desired. NPI testing experience with a silicon focus, particularly high-speed IPs such as PCIe, DDR, HBM. Knowledge of security protocols and security-focused silicon is a plus. Semiconductor packaging process knowledge is beneficial. Familiarity with PMIC circuits and devices, including switching and linear regulators, drivers, references, ADC, OTP / MTP, is a plus. Looking for candidates with a strong silicon-focused mindset for reliability engineering. Location : 3 days per week onsite Salary : $132K - $190K (DOE) Relocation assistance offered Offers competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.

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Reliability Engineer • San Jose, CA, US

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