Change the world. Love your job.
We enable next generation of Audio-Video in cars whether it is to enable self-driving in an ADAS system or rear-seat entertainment in an IVI system. You will be part of the team enabling high end experience in the future generation of cars.
In this position, you will be working on the physical design of high-speed mixed-signal SerDes circuits using state-of-the art process technology. You will be working on multi-million gate design with complex clock-trees and high-speed interfaces to Analog.
Your responsibilities will include synthesis, various steps of physical design such as floorplan, placement, clock-tree synthesis and debug, routing, timing closure, power analysis, IR-drop, EM-checks, physical verification such as DRC, LVS, Antenna etc.
As a physical design engineer, you will be responsible for tapeout in Digital-on-top flows or delivery of timing clean sub-chip for top-level integration in Analog-on-Top flows. You will be responsible to ensure the device meets the spec. requirement with regards to Power, Performance, and Area. You will develop solutions to complex problems through assessment of various techniques and approaches. You will plan and organize work to ensure timely completion of many independent tasks with general instructions on routine tasks and with detailed instructions on new assignments.
This position involves routine communication with a highly talented team of analog and digital design engineers to solve problems and present information as well as active participation in work groups, providing ideas and collaborative teamwork.
Why TI?
Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI ()
Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us.
About Texas Instruments
Texas Instruments Incorporated (Nasdaq : TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .
Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws.
If you are interested in this position, please apply to this requisition.
Minimum requirements :
12 years of relevant experience
Expertise with Cadence toolset for PnR, Timing Analysis and Synthesis
Familiarity with multi-clock domain Clock-Tree Synthesis (CTS) and debugging
Strong ability to understand physical realizations of logic structures and clocking
Experience through all aspects of digital sub-chip delivery including power, IR, EM, DRC, LVS etc
Skilled in writing TCL scripts for editing the netlist for cloning, load balancing and ECOs
Ability to work with multi-million gate designs
Ability to solve problems using a systematic approach
Preferred qualifications :
Demonstrated strong analytical and problem-solving skills
Strong verbal and written communication skills
Ability to work in teams and collaborate effectively with people in different functions
Strong time management skills that enable on-time project delivery
Demonstrated ability to build strong, influential relationships
Ability to work effectively in a fast-paced and rapidly changing environment
Ability to take the initiative and drive for results
Base Range Info : Base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. Your base pay will depend on your skills, qualifications, experience, and location. The base pay range for this role is shown below.
Base Range : $125,000 - $234,000 per year
ECL / GTC Required : Yes
Design Engineer • Santa Clara, CA, United States