A company is looking for a Principal Analog Mixed-Signal Engineer.
Key Responsibilities
Conduct low-level SPICE simulations and top-level algorithm development in Python and SystemVerilog / RNM
Ensure clear interfaces, specifications, and features across multiple teams
Develop calibration and test algorithms for mixed-signal designs
Required Qualifications
Experience with the Cadence Virtuoso IC design environment for analog and mixed-signal design
Proficiency in modeling circuits using Python / Numpy or MATLAB, Verilog-A, and SystemVerilog Real-Number Modeling
Experience in tracking and communicating mixed-signal interface requirements / specifications
Ability to work effectively in cross-functional teams
Strong background in developing calibration and test algorithms
Principal Engineer • Saint Paul, Minnesota, United States