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Signal Integrity (SI) and Power Integrity (PI) Engineer
Signal Integrity (SI) and Power Integrity (PI) EngineerGoldenpick Technologies • San Jose, CA, United States
Signal Integrity (SI) and Power Integrity (PI) Engineer

Signal Integrity (SI) and Power Integrity (PI) Engineer

Goldenpick Technologies • San Jose, CA, United States
3 days ago
Job type
  • Full-time
  • Part-time
  • Temporary
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Job description

JD : Signal Integrity (SI) and Power Integrity (PI) Engineer

Role :

  • Signal Integrity Engineer should support high-speed interface development and validation.
  • The engineer will work on state-of-the-art technologies such as LPDDR5X, PCIe Gen7, and UCIe (64G).
  • Responsibilities :
  • Perform channel modeling, extractions, and eye analysis for high-speed interfaces.
  • Conduct pre- and post-layout simulations to ensure compliance with interface standards.
  • Analyze crosstalk, reflections, jitter, and insertion / return loss.
  • Perform power integrity extractions and simulations for high-speed interfaces.
  • Model and analyze package / board PDN
  • Define decoupling strategy and validate against system requirements.
  • Collaborate with design, package, and PCB teams to optimize SI performance.
  • Generate reports and recommendations to support design decisions.
  • Provide design guidelines balancing both SI and PI constraints.

Qualifications :

  • BE / Mtech E&C / EEE
  • Strong background in both signal and power integrity.
  • Hands-on experience with SI tools (listed above).
  • Proficiency with PI extraction / simulation tools (e.g., PowerSI, SIwave, AEDT, HSPICE, equivalent).
  • Knowledge of DDR, PCIe, UCIe standards and PDN design best practices.
  • Familiarity with JEDEC / LPDDR5 / 6 and PCIe / UCIe standards.
  • Strong problem-solving skills and ability to work across cross-functional teams.
  • Strong analytical and communication skills.
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