Principal Verification Engineer (Founding Team)

Overview

As a Senior Hardware Validation Engineer, working hands-on at the frontier of silicon, AI, and ML-driven chip design. Collaborate with top engineers and innovators, pushing boundaries in world-class IP and SoC validation for next-generation devices. This range is provided by Brahma Consulting Group. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$200,000.00 / yr - $250,000.00 / yr

What You’ll Do

• Partner directly with the Head of Hardware to validate complex silicon IP and SoCs (RISC-V, PCIe / CXL, NoC, standard I / O) based on dynamic client needs.
• Independently define, drive, and coordinate validation, verification, and integration flows across multiple IPs, including checkpoints and reusable collateral.
• Build simulation and emulation-ready datasets and infrastructure; set up and run platforms such as Zebu and Palladium for rapid prototyping and proof-of-concept.
• Collaborate with architects, design leads, and AI / ML experts to generate robust validation coverage and checkers.
• Integrate company products into customer RTL, validation, and architectural pipelines seamlessly.
• Track emerging trends and advances in semiconductor and AI design automation.
• Develop internal benchmarks and datasets to evaluate and improve system performance from RTL to architecture.

Qualifications

Preferred

Seniority level

Mid-Senior level

Employment type

Full-time

Industry

Semiconductor Manufacturing

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