CPU Power Management and Debug Microarchitecture & Logic Design - Full Time
Join to apply for the CPU Power Management and Debug Microarchitecture & Logic Design - Full Time role at Rivos Inc.
Responsibilities
- Develop microarchitecture specifications for power management and debug features
- Own RTL development of power management and debug features
- Collaborate with verification, physical implementation, DFT, and firmware teams to deliver a design meeting functional, performance, and power requirements
- Work with external IP vendors to evaluate and integrate IP into the design
- Apply domain knowledge to propose and evaluate new features
Requirements
Knowledge of modern OoO CPU microarchitectures2+ years of relevant industry experience in CPU power managementUnderstanding of synchronous and asynchronous reset flowsExperience with active and idle power management techniquesProficiency in SystemVerilogKnowledge of coherent memory and bus protocols (AMBA, APB, SPI, I2C, etc.) is a plusKnowledge of RISC-V ISA is a plusEducation
Bachelors, Masters, or PhD in EE or ECE
Seniority Level
Entry level
Employment Type
Full-time
Job Function
Other
Industries
Computer Hardware Manufacturing
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