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Battery Management IC Engineer
Battery Management IC EngineerApple Inc. • San Francisco, CA, United States
Battery Management IC Engineer

Battery Management IC Engineer

Apple Inc. • San Francisco, CA, United States
30+ days ago
Job type
  • Full-time
Job description

Overview

You will be part of a small team responsible for the silicon part of Apple’s Battery Management systems. In this role you will work closely with the battery team to assemble the requirements for Battery Management ICs and translate those to circuit level specifications. We will work with the custom silicon team and vendors to implement those requirements. The role covers a broad range of activities including modeling the Battery Management behavior, running bench tests in support of design validation, debug, and characterization of embedded on-chip circuits (ADC’s LDO’s Clocks, bandgaps and bias networks). Furthermore, you will support in-system measurements for correlating with simulation models, assist in developing test plans and generate reports. We will work with chip design teams, system HW, FW and SW design teams, Test engineering, and Product Engineering.

Responsibilities

  • Model Battery Management behavior and run bench tests in support of design validation.
  • Debug and characterize embedded on-chip circuits (ADCs, LDOs, clocks, bandgaps, bias networks).
  • Support in-system measurements for correlating with simulation models.
  • Assist in developing test plans and generate comprehensive reports.
  • Collaborate with chip design teams, system hardware, firmware and software design teams, Test engineering, and Product Engineering.

Qualifications

  • BS and 10+ years of relevant industry experience.
  • BSEE / MSEE is preferred.
  • 5 years’ experience in Battery Management architecture design and circuit development.
  • Experience with the specification and design of ADCs for battery parametric measurement, battery gauging, and other key parameters of a Battery Management system.
  • Recent working knowledge of high resolution / accuracy ADC design and architecture technologies specifically of 1st / 2nd order ∆∑ ADC and SAR architectures.
  • Familiarity with post processing ADC filters.
  • In-depth understanding of performance improvement techniques such as dither, chopping and dynamic element matching.
  • Deep understanding of circuit building blocks such as bandgaps, LDOs, bias networks, clock oscillators.
  • Experience with MATLAB / Simulink and Python or C programming.
  • Knowledge of Li-Ion Battery safety requirements, high volume data analysis, failure analysis, and high volume IC mass production is a plus.
  • Experience in MCU, memory, serial interface (I2C, SPI), and FW are a plus.
  • Prior hands-on lab experience is desirable.
  • Demonstrates strong initiative, high-quality results, and consistently meets demanding deadlines.
  • Good written and verbal interpersonal skills.
  • #J-18808-Ljbffr

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