Senior Semiconductor Processing Engineer

Job Description

Advantest is seeking an experienced and visionary Senior Semiconductor Processing Engineer to serve as a key technical leader and strategic liaison in collaborative R&D projects with leading-edge wafer & package fabrication partners. This individual will bring deep expertise in advanced packaging fabrication, a strong track record of innovation and execution, and the executive presence to lead strategic conversations across customers, partners, and internal stakeholders.

The successful candidate will guide Advantest's efforts in engaging with semiconductor ecosystem partners to co-develop next-generation solutions in process integration, metrology, materials engineering, and yield optimization. The ideal candidate comes with broad and deep experience across front-end and back-end wafer manufacturing, advanced packaging, and a passion for solving hard semiconductor process problems.

This is a unique opportunity to shape the future of semiconductor processing at the intersection of innovation and collaboration. Join Advantest to lead groundbreaking work that bridges fabs, toolmakers, and test ecosystems.

Responsibilities

• Technical Strategy & Program Leadership : Lead strategic planning, ideation, and execution of joint R&D initiatives in engineering wafer processes and advanced packaging processes.
• Technical voice for wafer fab and advanced packaging technologies and trends.
• Identify critical challenges in technology scaling, manufacturing capabilities, and champion novel engineering approaches.
• Translate industry needs into internal innovation roadmaps.
• Collaborate with partner organizations to define, negotiate, and execute collaborative development agreements.
• Semiconductor Process Expertise : Broad process integration experience across wafer and advanced package technologies.
• Deep knowledge of unit-process modules (e.g., etch, deposition, lithography, CMP, thermal treatment, cleaning, metrology, defect inspection) across logic, memory, and advanced packaging nodes.
• Expertise in advanced packaging processes (e.g. 2.5D, 3D, Chiplets, Silicon Photonics, Hybrid Bonding, Advanced Substrates).
• Expertise in mapping advanced packaging defects into test & metrology solutions, esp. for substrate level defect inspection.
• Expertise in evaluating tool capabilities, process flows, and integration schemes for collaborative pilot development.
• Cross-functional Collaboration : Partner closely with design, manufacturing, reliability, test, and product engineering teams to ensure comprehensive solutions across the full Silicon lifecycle.
• Act as the bridge between customer technical experts and Advantest's engineering teams.
• Drive knowledge transfer and technical communication internally to align development resources.
• Customer & Partner Engagement : Lead executive-level and technical discussions with semiconductor customers, consortia, and partners.
• Develop and manage external collaborations that support Advantest's strategic semiconductor innovation roadmap.
• Represent Advantest at industry events, conferences, and technical working groups.
• Innovation & IP Strategy : Identify patentable innovations and support IP development efforts.
• Track industry and academic advancements to guide internal innovation.

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