Principal Architect Engineer
Join a pioneering startup as they build the compute platform for AGI! This innovative company creates vertically integrated solutions from silicon to systems, tailored for massive ML workloads.
They are looking for a SOC Architect to join their team in pioneering cutting-edge silicon for high-performance and sustainable GenAI applications. The ideal candidate will lead the creation of top-tier silicon architecture, ensuring high performance and functional accuracy at the full chip or subsystem level. This role encompasses delivering architectural solutions for products spanning compute, memory management, high-speed connectivity, and other critical technologies.
Job Description : Principal Architect Engineer
Roles and Responsibilities :
- Develop architecture specifications, pseudo code, and functional collateral outlining key components within their system.
- Collaborate closely with micro-architects, designers, physical designers, verification engineers, and other stakeholders throughout chip project definition and execution phases to ensure feasibility of silicon implementation.
- Partner with software and system architects to design a silicon architecture optimized for software and system-level requirements.
- Conduct performance analysis of the architecture using tools like software models, design simulations, emulation, and prototyping.
- Contribute to test plan development for pre- and post-silicon verification and validation activities.
- Engage with third-party partners on IP and technology integration into their products.
- Interface with customers to gather feedback and co-define product features.
Qualifications :
Demonstrated ownership of concept-to-silicon responsibility, driving architecture from specification to production silicon.Proficiency in SystemVerilog, Python, C / C++, Rust, Bluespec, or similar languages for chip architecture and silicon design.Proven success in delivering executable specifications as hardware architecture models.Track record of innovating features in ML, compute, networking, storage, and related fields for shipping products.Experience in diagnosing architectural issues at silicon and system levels with cross-functional teams.Bonus : Background in firmware and software development to test architectural features at product level.