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Silicon DD Engineer III
Silicon DD Engineer IIIService Global • Burlingame, CA, United States
Silicon DD Engineer III

Silicon DD Engineer III

Service Global • Burlingame, CA, United States
2 days ago
Job type
  • Full-time
Job description

Iron Systems is an innovative, customer-focused provider of custom-built computing infrastructure platforms such as network servers, storage, OEM / ODM appliances & embedded systems. For more than 15 years, customer have trusted us for our innovative problem solving combined with holistic design, engineering, manufacturing, logistic and global support services.

Job Title : Silicon DD Engineer III

Location : US - CA - Burlingame

What are the top non-negotiable skill sets required for this role?

  • Experience in RTL coding, synthesis and / or SoC Integration
  • Experience in digital design Architecture
  • Familiarity with Verilog, systemVerilog coding

Duties :

  • Contribute to the development of efficient µArchitectures and contribute to ASIC digital Architecture, design and verification
  • IPs integration
  • Understand Design for Verification concepts
  • Drive the top-level µArchitecture definition and develop the necessary RTL
  • Drive the chip-level integration, verification plan development and verification
  • Supervise the RTL-to-GDS flow and assist with synthesis and timing closure
  • Support the test program development, chip validation and chip life until production maturity
  • Work with FPGA engineers to perform early prototyping
  • Support hand-off and integration of blocks into larger SOC environments
  • Assist with Algorithm analysis, verification and improvement
  • Contribute to ASIC digital architecture, design and verification
  • Must Have :

  • 4+ years of experience as a Digital Design Engineer and / or a Chip Lead
  • Experience in RTL coding, synthesis and / or SoC Integration
  • Experience in digital design µArchitecture
  • BS Electrical Engineering / Computer Science or equivalent experience
  • Experience with UPF based simulation flow
  • System Verilog OVM / UVM experience
  • Tcl and Python (or similar) scripting experience
  • Experience in SoC integration and ASIC architecture
  • Wish List / Nice to Have :

  • Experience in DFT / Testability requirement and test program definition
  • Experience using High Speed interfaces like PCIe, USB, MIPI
  • FPGA design
  • Tensilica DSP, TIE, CNN, fixed point, floating point, python.
  • Experience with Power Aware GLS flow
  • MSEE / CS or equivalent experience
  • Education

  • Must Have : Bachelor degree in Electrical / Computer Engineering or Computer Science
  • Master's Degree preferred but not required
  • Mandatory Skills

    Must Have : Bachelor degree in Electrical / Computer Engineering or Computer Science Master's Degree preferred but not required

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