Digital Verification EngineerEthan Alexander Group, Inc. • Campbell, CA, United States
Digital Verification Engineer
Ethan Alexander Group, Inc. • Campbell, CA, United States
30+ days ago
Job type
- Full-time
Job descriptionProficiency in verification test planning, test bench architecture, assertions, problem solving and debugging Constrained random verification experience with System Verilog using OVM or UVM Set up coverage driven verification (code / functional / assertion coverage) Strong knowledge of Verilog or VHDL BS or MS (preferred) degree in EE or equivalent, with 5+ years of experience Experience in testbenches (block, system) and setting up verification flow from ground-up Understands secure / non-secure, interrupts, memory, and clock frequency switching Familiar with low-power designs, understands power saving techniques and verifications Wireless communications, knowledge of BLE at the protocol level Campbell (Silicon Valley), California, USA Irvine, California, USA
Digital Verification Engineer
Responsibilities :
- Develop test plans and verification infrastructure for low-power ASIC designs
- Build verification environments using SV / UVM methodology
- Build reusable bus functional models, drivers, monitors, checkers and scoreboards
- Debug / triage automated regressions, run gate level simulations, and perform coverage analysis
Requirements :
Nice to Have :
Location :
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Verification Engineer • Campbell, CA, United States