CPU Cache Subsystem Micro-Architect

Actively hiring

Job type : Full-time

Department : Workplace type :

On-site

Experience : 15 - 18 years

About Us

We`re a fast-growing CPU IP team building next-generation chips for Physical AI, Networking, and custom compute platforms. We`re lean, highly technical, and focused on accelerating innovation across all levels of the design stack. If you`re passionate about automation, infrastructure, and silicon scalability, you`ll thrive here.

About the Role

We are seeking for an experienced CPU Cache Sub-system Micro architect. Responsible for delivery of micro-architecture specifications of cutting-edge high performance, highly scalable multi-core, multi-thread, power-efficient CPU Cache sub-system. The candidate will be responsible for all aspects of the design including Functional Features, Performance, Power, and Area.

Key Responsibilities

• Define, own, and deliver detailed micro-architecture specifications for coherent cache sub-system
• Implement Product and Architecture requirements
• Define and analyze performance modeling studies for cache subsystem design choices
• Feasibility studies for Micro-architecture to RTL implementation
• Hands-on RTL design for critical functional blocks
• Hands-on experience with synthesis tools for micro-architecture trade-off analysis
• As part of highly configurable CPU IP, configure Features Development, assessment, and refinement of parameterizable RTL design to target power, performance, area, and timing goals
• Perform Functional verification support and assist in the design verification strategy
• Assist with the verification of RTL design performance goals
• Partner with a multi-functional engineering team to implement and validate physical design aspects of timing, area, reliability, testability, and power
• Assist with triaging, debugging and root causing functional and performance validation of the design on emulation and,or FPGA systems

Minimum Qualifications

Preferred Qualifications

What You`ll Get

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