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Staff/Sr. Staff PHY Design Engineer
Staff/Sr. Staff PHY Design EngineerInnoPhase IoT • San Jose, CA, United States
Staff / Sr. Staff PHY Design Engineer

Staff / Sr. Staff PHY Design Engineer

InnoPhase IoT • San Jose, CA, United States
1 day ago
Job type
  • Full-time
Job description

Innophase IoT is seeking a PHY Design Engineer to work on Low-power WiFi, BT / BLE micro-architecture and design. You will participate in the design development cycle, including high-level product specifications, RTL development, and collaboration with Algorithm and verification engineers.

Responsibilities

  • Develop and refine Digital Signal Processing engines for wireless communication systems.
  • Develop micro-architecture and SystemVerilog RTL to meet size, timing, and power targets.
  • Analyze design bottlenecks and provide feedback on micro-architecture and optimizations.
  • Develop and refine design, verification and analysis tools and flows, as needed.
  • Collaborate with Verification and Validation teams on test plans and coverage analysis.
  • Collaborate with Physical Design teams to provide guidance on floorplanning, constraint specifications, and timing closure.

Required Qualifications

  • BSEE or MSEE, with experience in ASIC development and / or FPGA prototyping
  • 7+ years of experience in RTL design using Verilog, SystemVerilog
  • Understanding of Digital Signal Processing theory and its mapping to design
  • Experience in WiFi Physical Layer, and / or other Physical layers (Cellular, Bluetooth, Zigbee, UWB, Ethernet)
  • Ability to work independently and proactively identify and resolve issues
  • Experience with Incisive / Excellium / VCS, Verdi, Jasper / Spyglass or equivalent tools
  • Experience in partitioning, synthesis, placement, timing closure for FPGA and / or ASICs
  • Experience with front-end design and integration tasks including lint, CDC, synthesis, and developing timing ECOs
  • Enjoy debugging and problem solving in a team environment
  • Preferred Qualifications

  • Experience in Low Power design development involving multiple power and voltage domains
  • Embedded software and hardware design is a strong plus
  • Experience with Python, Perl, Tcl, C / C++ and shell scripts
  • Experience with lab debug and multi-team, multi-site working environments
  • Experience with ASIC and FPGA synthesis flows using leading industry tools
  • Experience using PowerArtist / Joules and providing actionable feedback into design
  • We pursue innovation to deliver leading ULP wireless IoT solutions for home, building and industrial automation and wearables. We seek motivated people who share a passion for teamwork and the vision to advance the IoT industry.

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    Staff Design Engineer • San Jose, CA, United States

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