Staff RTL Engineer, Ethernet

About Eridu AI

Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today's AI performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency. The company's solutions and value proposition have been validated by several leading hyperscalers.

The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ : INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World's leading micro-LED company and developer of the first augmented reality contact lens).

Position Overview

We are seeking an RTL Engineer to help define and implement our industry-leading Networking IC. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking devices.

The candidate will be part of Design Group responsible for defining, specifying, architecting, executing and productizing leading-edge Networking devices.

Responsibilities

• Collaborate with Chip and System Architects to translate architecture requirements into microarchitecture and design integration of the Ethernet IO subsystem, including MAC, PCS, and SerDes.
• Perform RTL coding, conduct code reviews, and debug designs.
• Work with third-party vendors to procure and integrate the Ethernet block with MAC, PCS, and PHY.
• Partner with Verification Engineers to define the test plan, execute verification, and understand both serial and parallel mode VIP behavior.
• Debug the full Ethernet protocol stack.
• Engage in post-silicon activities such as bring-up, platform validation, characterization, parameter optimization, and final productization.
• Support the definition of development flows that improve execution efficiency and quality.
• Collaborate closely with Physical Design, Firmware, and Design Verification teams to ensure successful end-to-end RTL implementation.

Qualifications

Why Join Us?

At Eridu AI, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.

The pay range for this role is :

210,000 - 275,000 USD per year(San Francisco Bay Area)

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