IC Package Designer (Semiconductor)

Job Title : IC Package Designer

Experience :  5+ Years

Location :  San Jose (Work from Office / Onsite)

We’re looking for an experienced Packaging Designer to develop creative and cost-effective IC package designs.

Job Description :

Netlist & BGA creation

Substrate stack-up & routing strategy definition

Experience with RF, Digital, High-speed & Mixed-signal die

Strong knowledge of SI / PI requirements (DDR, SERDES, etc.)

Expertise in UCIE (Advanced & Standard), HBM, CoWoS, 2.5D / 3D, RDL, Flip Chip, and Wire Bond technologies

Familiar with HDI substrates, DRC setup, and OSAT rules

Proficiency in Cadence Allegro Package Designer

Qualification :

Bachelor’s in Electronics / Electrical Engineering

5+ years in IC package design & development