We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. You'll work closely with cross-functional teams in the Key Responsibilities:Perform package substrate design and analysis (SI/PI/routing)Collaborate with layout engineers, marketing, and global design teamsUse tools like HFSS, ADS for package modeling/simulationContribute during pre/post-sales processes Why is This a Great Opportunity This is an outstanding technology, great opportunity to learn. Growing company with a lot of IP. Everyone contributes. Qualifications:BS in EE or related field; MS preferred8-10 years of experience in semiconductor package designStrong SI/PI analysis, modeling, and simulation skillsExcellent communication, teamwork, and presentation abilities Preferred Skills:Expertise in high-speed package/PCB design (SerDes, PCIe, LPDDR, Ethernet)Time/frequency domain analysis, impedance, jitter, eye-diagram, BER analysisExperience with Hspice, Redhawk, electro-thermal simulation, PDN modelingFamiliarity with reliability analysis and packaging/assembly rules
Senior Engineer Package DesignerThe PJF Group • San Jose Bay Area, CA, US
Search for other jobs
Job description
Create a job alert for this search
Senior Engineer Package Designer • San Jose Bay Area, CA, US