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SerDes System Validation Engineer
SerDes System Validation EngineerApple Inc. • Austin, TX, US
SerDes System Validation Engineer

SerDes System Validation Engineer

Apple Inc. • Austin, TX, US
4 days ago
Job type
  • Full-time
Job description

In this highly visible role, you will actively work within Analog-Mixed / Signal design team and participate in validation and debug of embedded circuits; collaborating with many subject areas to enable the world's premiere products. You will closely work with a talented group of Analog-Mixed / Signal designers working diligently to deliver hard IPs to Apple's products while exceeding the highest expectations of quality, innovation and efficiency! At Apple, we work every single day to craft products that enrich people's lives. And in doing so face great challenges as SOC / PHY design complexity continues to increase. If you have strong fundamentals and a track record of tackling technical challenges. If you are inspired by your curiosity and eagerness to learn new skills and to improve the value and impact of your work. If you like to be tuned to the bigger-picture while diving deeply into the details to innovate and solve problems. If you love working with people and teams with multifaceted strengths to accomplish great things. If you like fire-fighting when challenges occur while keeping a phenomenal team spirit. If you care about society and have demonstrated leadership skills through dedication to great causes. We have an opportunity for a forward-thinking and especially hardworking system validation engineer with strong background in high speed serial links. As a member of our dynamic team, you will have the rare and rewarding opportunity to work on upcoming products that will surprise and delight millions of Apple's customers every day! And all of this while enjoying a great culture where you own your career.

Description

Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in system. Work with design teams to understand the architecture and define DFT needs to help improve testability and first time silicon success. Be involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher level control logic.

Minimum Qualifications

  • BS and 3+ years of relevant industry experience.

Preferred Qualifications

  • The ideal candidate should have experience in high-speed serial links with expertise in the following :
  • Very knowledgeable about and experienced with common high-speed SerDes protocols (e.g., PCIe, USB, SATA, etc.)
  • Deep knowledge in system bring-up of high-speed serial links, lab testing, and defining equipment needs
  • Strong knowledge in scripting (e.g. python, C, Matlab) for automation of validation efforts. Experience with system level S / W setup is a plus
  • Knowledge of SerDes design and architecture including CDR and equalization
  • Able to think outside the box and come with creative solutions for system validation.
  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

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    Validation Engineer • Austin, TX, US

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