Design Verification Engineer

Define the verification plan and provide technical direction to execution teams.

Comprehend AMS, Firmware, and design specifications.

Collaborate with other functional leads to develop and execute the overall DV plan.

Create UVM / SystemVerilog based testbenches and tests.

Lead formal verification efforts.

Work to ensure the final design is bug-free.

Support post-silicon teams to debug and resolve product performance, power, and functional issues.