VP, SerDes Validation and Applications

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Job Description : Altera, a leader in programmable solutions from cloud to edge, delivers cutting‑edge FPGA, CPLD, and IP technologies. As a standalone business unit spun out from Intel’s Programmable Solutions Group, Altera is driving innovation in high‑speed connectivity, AI acceleration, and next‑generation data infrastructure.

Position Overview : We are seeking a visionary and technically accomplished Vice President to lead our SerDes Validation and Applications Engineering organization. This role is critical to ensuring the robustness, performance, and customer success of Altera’s high‑speed serial interface technologies across our FPGA product portfolio.

Key Responsibilities

Strategic Leadership

• Define and execute the validation and applications strategy for SerDes IP across Altera’s product lines.
• Lead cross‑functional initiatives to ensure first‑time silicon success and customer satisfaction.
• Represent Altera in industry standards bodies and technical forums related to SerDes technologies.

Technical Oversight

Team Management

Customer Engagement

Qualifications

Job Type : Regular

Shift : Shift 1 (United States of America)

Primary Location : San Jose, California, United States

Posting Statement : All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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