ASIC Digital Design, Staff Engineer

Synopsys
Mountain View, CA, United States
$122K-$182K a year
Full-time
We are sorry. The job offer you are looking for is no longer available.

Design Verification Engineer (Staff)

51258BR

USA - California - Mountain View / Sunnyvale

Job Description and Requirements

In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers.

Qualifications :

  • BSEE in EE with 5+ years of industry experience
  • Experience in ASIC Verification
  • Verilog, System Verilog and Perl / Python scripting skills
  • Proficiency in UVM verification environment
  • Debugging skills
  • Demonstrates good communication and problem-solving skills
  • Understanding of high-speed interface protocols is a plus

Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors.

All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications.

And get differentiated products to market quickly with reduced risk.

At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence.

The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security.

If you share our passion for innovation, we want to meet you.

The base salary range across the U.S. for this role is between $122,000-$182,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses.

Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education.

Your recruiter can share more specific details on the total rewards package upon request.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Job Category

Engineering

Country

United States

Job Subcategory

ASIC Digital Design

Hire Type

Employee

Base Salary Range

$122,000 - $182,000

2 days ago
Related jobs
Promoted
VirtualVocations
Fremont, California

A company is looking for an ASIC Digital Design Engineer responsible for digital design and implementation in the WiFi MAC team. Ethernet) protocols, and high-performance bus interfaces like AXI and AHBCross-functional experience working with software, verification, and physical design teams. ...

Promoted
Aeva, Inc.
Mountain View, California

The ideal candidate will possess strong proficiency in ASIC/Silicon development - digital design, verification, and implementation, coupled with a deep understanding of safety-critical ASIC development processes. An ASIC Design Engineer with expertise in ISO-26262 functional safety standards. Implem...

Promoted
Wipro
Sunnyvale, California

Verilog programming experience for ASIC, with proficiency in front-end Cadence tools and methodologies, along with a demonstrable track record of delivering complex RTL logic designs for multi-million gate high speed processors/ASICs. BS/MS in Electrical/Computer Engineering or similar field. ...

Promoted
Power Integrations
San Jose, California

As a Senior Staff IC Design Engineer, you will be responsible for switching power supply development of integrated circuits using CMOS/Bipolar analog/digital circuitry. A minimum of 5 years of experience with emphasis on analog and/or digital Integrated Circuit ( IC ) design. Hands-on experience wit...

Promoted
Google Inc.
Sunnyvale, California

ASIC RTL Design Engineer, Machine Learning Accelerators. Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience. Digital design using SystemVerilog RTL. ASIC design using SystemVerilog or RTL. ...

Promoted
Apple, Inc.
Cupertino, California

As an ASIC Design Engineer in the Pixel IP DMA team, you will work closely with architecture, design, and verification teams to build dedication and low power DMA engines. Experience in SoC front-end ASIC RTL digital logic design using Verilog or System Verilog. Experience working multi-functionally...

Aeva
Mountain View, California

The ideal candidate will possess strong proficiency in ASIC/Silicon development - digital design, verification, and implementation, coupled with a deep understanding of safety-critical ASIC development processes. An ASIC Design Engineer with expertise in ISO-26262 functional safety standards. Implem...

Zoox
Foster City, California

You will work with engineers across internal vehicle engineering teams, and various suppliers to evaluate design, advise on best practices and develop road maps for future applications. As a Hydraulic Design Engineer, and Fluid Actuation Subject Matter Expert, at Zoox you will consult on projects in...

NVIDIA
Santa Clara, California

We are now looking for a Senior ASIC Engineer - DFX Software. Apply advanced Design-For-Test (DFT) and Automatic Test Pattern Generation (ATPG) knowledge to the development of automation software that enables efficient test pattern generation, application of these patterns on Silicon, failure analys...

Apple
Cupertino, California

Will you join us in crafting solutions that do not yet exist? As a member of Mixed-Signal design team, you will create and support innovative design methodology and customize and automate flows for advanced Mixed-Signal IP designs. As a team member of the Methodology Design team, you will be involve...