Senior Design Automation Engineer – Flow Automation

Altera .#

• Job Details :
• ### ##
• Job Description :
• For decades, Altera has been at the forefront of programmable logic technology. Our commitment to innovation has empowered countless customers to create groundbreaking solutions that have transformed industries.Join us in our journey to becoming the world’s #1 FPGA company!Altera is seeking a
• Senior Design Automation Engineer – Flow Automation
• to join our Design Methodology Automation and Infrastructure Team.The Design Methodology Automation and Infrastructure Team is responsible for building and maintaining the core automation infrastructure that supports Altera’s FPGA design flows—from RTL to GDSII. In this role, you will play a critical part in scaling our internal design productivity, delivering highly automated, reliable, and efficient flow systems that accelerate development cycles for next-generation FPGA products.Key Responsibilities of the Senior Design Automation Engineer include but are not limited to :
• Shape, develop, deploy, and support design automation flows and methodologies for digital and / or analog design.
• Evaluate, integrate, and enhance EDA tools to support design productivity, efficiency, and quality.
• Automate repetitive design tasks, ensuring robust, scalable, and maintainable solutions.
• Partner with design and verification teams to identify bottlenecks and implement improvements.
• Provide expertise in scripting, tool customization, and flow development for advanced semiconductor design.
• Drive continuous improvements in design automation infrastructure and methodologies.
• Collaborate with internal and external EDA vendors to resolve issues and implement new capabilities.
• Salary Range :
• The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
• $142.6K - $206.5K USD
• #LI-MD1### ##
• Qualifications :
• Minimum Qualifications :
• Bachelor’s or Master’s Degree in Computer Science, Electrical Engineering, or related field with 8+ years of relevant industry experience, including :
• Hands-on experience with EDA tools and FPGA / ASIC design flows (e.g., synthesis, STA, P&R, Signoff).
• Proficiency inUnix / Linux environments and scripting / programming languages such as Python, Tcl, and Shell.
• Experience buildingflow automation toolsand integrating them into complex design pipelines.
• Collaborating with cross-functional teams and translating user requirements into scalable solutions.
• Preferred Qualifications :
• 10+ years of relevant industry experience with Design Automation tools
• Experience with digital and / or analog design flows (synthesis, P&R, STA, verification, etc.).
• Familiarity with high-performance computing environments and job schedulers.
• Strong communication and collaboration skills, with the ability to partner across design and CAD / EDA teams.
• Prior experience in large-scale SoC or IP development environments.### ##
• Job Type :
• Regular### ##
• Shift :
• Shift 1 (United States of America)### ##
• Primary Location :
• San Jose, California, United States### ##
• Additional Locations :
• ### ##
• Posting Statement :
• All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

#J-18808-Ljbffr