Senior Design Engineer – Coherent Interconnect
Tachyum Inc.Santa Clara, CA, United States16 hours ago
Job type
- Full-time
Job descriptionRequires 10 to 15 years of applicable experience (bright individuals with lower experience can also apply) Experience and background with multicore coherence Familiarity microprocessor cache systems Experience with embedded logic analyzers is a plus Verilog / System Verilog / Synthesis / STA / CDC / Lint experience
What You’ll be Doing
- Working with a small team to implement, debug, and verify a high-performance coherence management system
- Build the infrastructure to support integrity testing and debug on emulation system
Skills Required
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Senior Design Engineer • Santa Clara, CA, United States
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