Overview
Do Something Wonderful!
Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Who We Are
We are seeking a highly skilled Verification Engineer to work on verification and validation of advanced memory coherency fabric systems for next-generation data center and AI chips. The ideal candidate will have a strong background in pre-silicon verification, an understanding of memory coherency protocols and interconnect architectures, and hands-on experience developing testbenches and validation strategies.
Who You Are
Responsibilities
Performs functional verification of IP logic to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
Documents test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology.
Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Qualifications
Minimum Qualifications
The candidate must have a Bachelors Degree in Computer Engineering / Computer Science or Electrical Engineering with 4+ years of relevant experience -OR- a Masters Degree in Computer Engineering / Computer Science or Electrical Engineering with 3+ years of relevant experience
Preferred Qualifications
Proficiency in System C System Verilog UVM and ESL modeling methodologies
Proficiency in HW design and verification methodologies
Working knowledge of highspeed HW protocols e.g. PCIe UPI DDR
Knowledge of Software development practices and quality standards. Experience with Unix / Windows based SW development tools
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here : [job site information not reproduced in this refined version]
Work Model
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
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Design Verification Engineer • Santa Clara, CA, United States