Staff Engineer, Design Verification

Samsung SemiconductorSan Jose, CA, United States

Hace 2 días

Tipo de contrato

A tiempo completo

Descripción del trabajo

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Please Note

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the Worlds Technology Together

Our technology solutions power the tools you use every day including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, youll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of whats possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. Were dedicated to empowering people to be their true selves. Together, were building a better tomorrow for our employees, customers, partners, and communities.

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI / ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance.

Location : Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What Youll Do

Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages.
Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers.
Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics.
Provide comprehensive documentation of verification strategy and ensure test environment is easy to use.
Mentor junior engineers when necessary
Work cross-functionally in debugging failures with design, compiler and simulation engineers

What You Bring

Bachelors with 10+ years, or Masters with 8+ years, or PhD's with 5+ years of industry experience.

Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C / C++ and scripting languages such as Perl / Python.

Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing

Understanding RTL and strong overall debugging skills

Prior experience with computational logic, interconnect networks and / or memory system is desirable

Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators

Knowledge of FPGA and emulation platforms preferred

Strong analytical and problem-solving skills

Excellent communication and interpersonal skills

Ability to work independently and as part of a team

Youre inclusive, adapting your style to the situation and diverse global norms of our people.

An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.

Youre collaborative, building relationships, humbly offering support and openly welcoming approaches.

What We Offer

The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factorsincluding the roles function and location, as well as the individuals knowledge, skills, experience, education, and training.

Base Pay Range : $157,000$243,000 USD

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

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Design Verification Engineer • San Jose, CA, United States