Job Posting
Top Hard Skills Required
Proficient in defining and developing unit and IP / SoC level test benches using SystemVerilog and VMM / OVM / UVM (5+ YOE)
Experience with high speed serial or wide parallel interfaces such as D2D, Ethernet / PCIe / USB or DDDR PHY IPs (5+ YOE)
Analog and Mixed-signal IP's such as Client's, Bandgaps, Power Regulators (5+ YOE)
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Hardware Design Engineer • Mountain View, CA, United States