Senior FPGA Design Engineer

MemComputing — Redefining What’s Possible

Join a small, senior team at MemComputing that’s rethinking how AI is computed in silicon. We’re quietly building advanced AI hardware in stealth mode, and we’re looking for engineers who want to help invent what comes after GPUs—while working closely with founders and architects on first-of-its-kind systems.

Senior FPGA Design Engineer

You’ll lead the design and integration of advanced accelerator and compute platforms based on Xilinx Versal SoC architectures. This role focuses on RTL design, system-level integration, and performance optimization across multi‑clock, SSIT environments.

Key Responsibilities

• Own FPGA RTL design and system‑level integration for accelerator and SoC‑based platforms.
• Architect and implement high‑performance, pipelined designs using Vivado Design Suite targeting Xilinx UltraScale / Versal devices.
• Develop and integrate AXI4‑MM‑based interfaces for data movement, memory access, and host communication.
• Perform timing analysis, static timing closure, and hardware debug using Vivado, QuestaSim, and ILA, and other tools.
• Collaborate closely with hardware, software, and systems teams to enable Linux‑based system bring‑up and end‑to‑end data path validation.
• Use Tcl scripting and Python for automation, build flows, and verification integration.
• Contribute to continuous improvements in performance, reliability, and design methodologies.

Required Qualifications

Preferred / Nice‑to‑Have

Benefits & Compensation

MemComputing is an equal opportunity employer. We welcome candidates of all backgrounds, identities, and experiences to apply.

Seniority level : Mid-Senior level.

Employment type : Full‑time.

Job function : Engineering and Information Technology.

Industries : Computer Hardware Manufacturing.

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