FPGA / ASIC Design Engineer
Akaasa TechnologiesReston, VA, United States1 day ago
Job type
- Full-time
- Quick Apply
Job descriptionHigh Level Synthesis (HLS) with Vivado, Embedded SW C++ (OOP) and System Verilog Assertions (SVA) Knowledge of high-speed protocols (PCIe, TCP / IP, Ethernet) VHDL Experience is required for all candidates to be considered. Looking for mid-senior level folks Proficient in VHDL > Must have done hands on multiple complex designs arch / design / verification / Synthesis / STA Big Plus Working with Ethernet protocol (not just instantiating the IP) Is a big plus. Mentor EDA CDC / Lint / AC / RDC Derive engineering specifications from system requirements and develop detailed architecture Execute design (RTL AND / OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis / STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon / FPGA bring up, characterization and production ramp / support / collateral Prior experience in Aerospace / Defense Experience in C++ (OOP) Experience in Xilinx MPSOC design with writing / debugging with SDKs, BSPs on bare metal / PetaLinux OS. Experience with High level synthesis (Xilinx Vivado HLS, AND / OR Mentor Calypto). Experience with Universal Verification Mythology (UVM) Experience with project leadership and EVM Bachelors Degree in Electrical Engineering or equivalent degree, and minimum 4 years of prior relevant experience (or Masters Degree plus 2 years of prior relevant experience) developing, implementing, and verification of high-performance communications / networking ASIC / FPGA products.
Active Secret Clerance
This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security.
Skills / Experience :
- Bachelors Degree in Electrical Engineering or equivalent degree, and minimum 4 years of prior relevant experience (or Masters Degree plus 2 years of prior relevant experience) developing, implementing, and verification of high-performance communications / networking ASIC / FPGA products.
- Experience mapping algorithms and standards (Ethernet, TCP / IP, AXI) to hardware and architecture / system design tradeoffs.
- Proficient in VHDL design process and FPGA flow
- Knowledge of Ethernet, TCP / IP protocols
- Strong logic / board debug, and analytical skills.
- Excellent written, verbal, and presentation skills.
A PLUS for prior experience with :
5 yrs, Xilinx FPGA design EDA- Vivado
Required Skills :
Desired Skills :
Degree Requirements :
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Design Engineer • Reston, VA, United States
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