Senior System Validation Engineer

Overview

Senior System Validation Engineer . This exciting role will be responsible for validating high-speed memory buffer semiconductor products, developing automation scripts, and ensuring system compliance with performance specifications. The engineer will need to have deep experience with processor-memory interfaces (DDR5 / DDR6), high-speed signaling, and signal / power integrity to be successful in this role. They are headquartered in the San Jose, CA area, and this position can sit in either San Jose, CA, or Atlanta, GA area. The company is a silicon IP provider for the semiconductor manufacturing industry. If you are an individual who has expertise in validating memory buffer chips and loves to be hands-on and optimize processes, this role could be for you!

Responsibilities

• Bring up and validate x86-based server systems with high-speed memory buffer products.
• Automate lab workflows : develop scripts for lab equipment control and data analysis.
• Support applications and design teams in debugging and resolving system-level issues.
• Collaborate on DDR system validation, including DDR topologies, protocols, and compliance.
• Work with design and validation teams to debug power delivery networks, signal / power noise, and other high-speed design challenges.
• Contribute to modeling, simulation, and system-level validation efforts.

Qualifications

Salary

Weekly Schedule

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