Sr. Verification Engineers
Location : San Jose, CA or Remote
Relocation okay.
H1 transfer okay.
Client is in the AI space.
Responsibilities :
- Pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP blocks.
- SoC / Subsystem verification of embedded CPUs such as ARM / RISC-V and interconnect subsystem (including C and assembly diag validation)
- Develop the block-level, sub-system and full-chip verification environment
- Triage and debug functional and performance issues with the design-under-test.
- Handle bug tracking and coverage convergence.
- Diagnostic and post-silicon validation testing
Required Qualifications :
- 5+ years of ASIC verification experience.
- Knowledge of ARM / MIPS / RISC-V Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation
- AMBA / APB / AXI Protocol
- Exp. with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C ....
- Strong Verilog / System Verilog programming skills.
- Experience with UVM (or similar).
- Good understanding of object oriented programming principles, constrained random stimulus, and a coverage driven verification approach.
- Scripting experience (Python, Perl, TCL, shell programming) highly-desirable.
- B.S. degree in Electrical or Computer engineering (or similar field).
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