Advanced Packaging Engineer

Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today's AI performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency. The company's solutions and value proposition have been validated by several leading hyperscalers.

The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ : INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World's leading micro-LED company and developer of the first augmented reality contact lens).

Position Overview

We are seeking an Advanced Packaging Engineer to lead the development, integration, and production enablement of next-generation multi-die packaging solutions, including 2.5D CoWoS, bridge-based, and high-density chiplet assemblies.

This role drives end-to-end packaging technology innovation and integration from test vehicle design and early process learning through manufacturing readiness and high-volume production ramp. The ideal candidate brings deep technical expertise in fine-pitch interconnects, substrate / interposer technologies, and multi-die co-design, coupled with a hands-on, collaborative approach to working with foundries, OSATs, and system design teams to deliver scalable, high-performance, and reliable packaging solutions.

Responsibilities

• Own test vehicle definition and execution for advanced packaging technologies (2.5D CoWoS, 3D, bridge-based, high-density MCM) to drive process learning and technology validation.
• Lead process and material development for advanced flip-chip and multi-die assembly flows, including die attach, microbump bonding, underfill, molding, and substrate attach to achieve optimal performance, yield, and reliability.
• Collaborate with foundries, OSATs, substrate vendors, and system contract manufacturers to ensure material readiness, tooling qualification, BOM completeness, and process maturity from pilot to early production builds.
• Drive system-level package co-design in collaboration with silicon floor planning, mechanical, and SI / PI teams to optimize thermal, mechanical, and electrical performance trade-offs, ensuring manufacturable and reliable solutions.
• Define and execute qualification and reliability test plans, including DFR, thermal cycling, warpage control, and mechanical stress evaluations.
• Implement DFM, DFY, DOE, and FMEA methodologies to identify process sensitivities, optimize critical parameters, and drive design / process robustness.
• Lead failure analysis and root cause investigations for yield, reliability, and process excursions, coordinate with FA and design teams for rapid issue resolution and feedback integration.
• Establish design rules, material specifications, and integration guidelines to standardize best practices across programs and suppliers.
• Deliver concise technical reports, risk assessments, and milestone updates to internal and external stakeholders.
• Drive continuous improvement in assembly processes, reliability, and cost / yield performance through data-driven experiments and supplier engagement.
• Drive and support end-to-end productization and system-level module assembly integration with package partners and contract manufacturers, ensuring seamless technology transition into production.

Qualifications

Why Join Us?

At Eridu AI, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.

The pay range for this role is :

210,000 - 265,000 USD per year (San Francisco Bay Area)

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