Talent.com
Senior Design Verification Engineer

Senior Design Verification Engineer

JobotSunnyvale, CA, United States
3 days ago
Job type
  • Full-time
Job description

This Jobot Job is hosted by : Holly Leahy

Are you a fit? Easy Apply now by clicking the "Apply" button and sending us your resume.

Salary : $150,000 - $200,000 per year

A bit about us :

We are seeking a dedicated and detail-oriented Quality Technician to join our team. As a Quality Technician, you will play a critical role in ensuring the highest standards of quality in the manufacturing and assembly of cutting-edge electronics and components. This position will require you to collaborate closely with various teams to drive improvements and ensure products meet strict specifications and functional requirements.

Why join us?

premiere medical, dental, vision, and life insurance plans

401k

Inclusive, flexible work environment.

We offer healthy snacks and daily catered meals, in addition to family-friendly company events featuring our CEO's famous BBQ!

Job Details

About the Role

Join a world-class team building the next generation of high-performance compute hardware for artificial intelligence and machine learning applications. We're developing industry-leading AI accelerators that push the limits of scale, speed, and efficiency-empowering researchers and enterprises to train and deploy the largest AI models with unprecedented ease.

As a Senior Design Verification Engineer, you'll own the end-to-end verification of a critical subsystem in our next-generation AI processor. You'll collaborate with experts across architecture, RTL design, physical design, firmware, and validation to ensure flawless execution from concept to post-silicon bring-up.

This is a high-impact role where your technical insight, leadership, and creativity will directly shape the success of our products.

Key Responsibilities

Own and drive the full verification lifecycle for a major IP block-from initial strategy through post-silicon validation.

Define and implement advanced verification methodologies, test plans, and coverage metrics that ensure top-tier quality and performance.

Develop and maintain UVM-based, constrained-random and directed testbenches.

Collaborate closely with architecture and design teams to review specifications and ensure functional correctness and testability.

Debug complex issues spanning simulation, emulation, and silicon.

Enhance verification infrastructure and flows for improved scalability, coverage, and turnaround time.

Mentor and guide junior engineers, promoting best practices and technical excellence.

Provide clear communication and technical leadership on progress, risks, and schedules across teams.

Qualifications

10+ years of design verification experience in complex ASIC / SoC projects.

Deep proficiency in SystemVerilog and UVM.

Strong understanding of verification planning, coverage closure, and constrained-random methodologies.

Experience with industry-standard EDA tools, simulators, and debugging environments.

Skilled in scripting languages (Python, Perl, or similar) for automation and productivity.

Demonstrated success in cross-functional collaboration and problem-solving.

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

Preferred Experience

Verification of memory controllers, high-performance interconnects, or compute subsystems.

Exposure to emulation, FPGA prototyping, or post-silicon bring-up.

Contributions to developing scalable, reusable verification environments and methodologies.

Proven ability to influence verification strategy and mentor others in advanced techniques.

Interested in hearing more? Easy Apply now by clicking the "Apply" button.

Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, sex, sexual orientation, gender identity, religion, national origin, age (40 and over), disability, military status, genetic information or any other basis protected by applicable federal, state, or local laws. Jobot also prohibits harassment of applicants or employees based on any of these protected categories. It is Jobot's policy to comply with all applicable federal, state and local laws respecting consideration of unemployment status in making hiring decisions.

Sometimes Jobot is required to perform background checks with your authorization. Jobot will consider qualified candidates with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.

Information collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at .

By applying for this job, you agree to receive calls, AI-generated calls, text messages, or emails from Jobot, and / or its agents and contracted partners. Frequency varies for text messages. Message and data rates may apply. Carriers are not liable for delayed or undelivered messages. You can reply STOP to cancel and HELP for help. You can access our privacy policy here :

Create a job alert for this search

Design Verification Engineer • Sunnyvale, CA, United States

Related jobs
  • Promoted
Senior Design Verification Engineer

Senior Design Verification Engineer

Mirafra TechnologiesSan Jose, CA, US
Full-time
Job Requirements are as below : .Architect block and full-chip verification environments using HVLs and constrained random. SOCs with embedded CPUs and mixed signal interfaces.Requires UVM, System Ver...Show moreLast updated: 2 days ago
  • Promoted
  • New!
Design Verification Engineer

Design Verification Engineer

IntelliswiftMenlo Park, CA, United States
Full-time
Testbench development - System Verilog UVM and C tests.Integration / development of C tests / APIs and SW build flow.Integration / development of UVM mailboxes and HW / SW communication components.Integrat...Show moreLast updated: 13 hours ago
  • Promoted
Verification and Validation Engineer / Senior V&V Engineer

Verification and Validation Engineer / Senior V&V Engineer

Bayside SolutionsSan Mateo County, CA, US
Full-time +1
Verification and Validation Engineer / Senior V&V Engineer.Conduct design verification and validation testing for product development activities. Support all technical aspects of the product and i...Show moreLast updated: 30+ days ago
  • Promoted
  • New!
Design Verification Engineer

Design Verification Engineer

QuEST GlobalPalo Alto, CA, United States
Full-time
Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry knowledge and digital expertise. By bringing together technologies and industries, alongside the co...Show moreLast updated: 13 hours ago
  • Promoted
Design Verification Engineer

Design Verification Engineer

Mythic, Inc.Palo Alto, CA, United States
Full-time
We’re hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to l...Show moreLast updated: 30+ days ago
  • Promoted
  • New!
Sr Design Verification Engineer

Sr Design Verification Engineer

DBSIMilpitas, CA, United States
Full-time
Sr Design Verification Engineer.Primary Responsibilities Include : .Responsible for all aspects of verification methodology employed and for ensuring the application of uniform standards and adoption...Show moreLast updated: 13 hours ago
  • Promoted
Formal Design Verification Engineer

Formal Design Verification Engineer

ACL DigitalSan Jose, CA, US
Full-time
We are looking for candidates with most recent hands-on experience in formal verification.Minimum of 3yrs experience (most recent experience in formal verification) & NOT looking for anyone wit...Show moreLast updated: 23 days ago
  • Promoted
Senior Quality R&D Design Engineer, Med Device, Design Controls

Senior Quality R&D Design Engineer, Med Device, Design Controls

Eliassen GroupRedwood City, CA, US
Temporary
Senior Quality R&D Design Engineer - Design Controls, Risk Management.BUSINESS PROBLEM, CONTEXT & INITIATIVE DESCRIPTION. Our client is a privately held medical device company based in North...Show moreLast updated: 4 days ago
  • Promoted
Design Verification Engineer

Design Verification Engineer

AppleCupertino, CA, United States
Full-time
Does making the next great technology product excite you? Imagine what you could do here.At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quick...Show moreLast updated: 5 days ago
  • Promoted
  • New!
Design Verification Engineer

Design Verification Engineer

Capgemini EngineeringSanta Clara, CA, United States
Full-time
Get AI-powered advice on this job and more exclusive features.Direct message the job poster from Capgemini Engineering.About the Job You're Considering. Join a collaborative and forward-thinking tea...Show moreLast updated: 13 hours ago
  • Promoted
Verification Validation Engineer, Medical Device

Verification Validation Engineer, Medical Device

SciProHayward, CA, US
Full-time
This is not a software role • • •.The focus will be mechanical / medical device testing and V&V protocols through simulated use studies in partnership with surgeons. Design Verification & Valid...Show moreLast updated: 30+ days ago
  • Promoted
Senior Quality Engineer (Design Assurance)

Senior Quality Engineer (Design Assurance)

Presidio Medical, Inc.South San Francisco, CA, US
Full-time
At Presidio Medical, we are transforming the way neuromodulation balances the human nervous system and are striving to end the cycle of unnecessary pain and help patients live their best lives.Pres...Show moreLast updated: 2 days ago
  • Promoted
Senior Design Verification Engineer

Senior Design Verification Engineer

quadric.ioBurlingame, CA, United States
Full-time
Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture.Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads...Show moreLast updated: 5 days ago
  • Promoted
Design Verification Engineer, Senior Staff

Design Verification Engineer, Senior Staff

d-MatrixSanta Clara, CA, United States
Full-time
AI to power the transformation of technology.We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. We value humility and believe in direct communic...Show moreLast updated: 30+ days ago
  • Promoted
  • New!
Senior Quality Engineer

Senior Quality Engineer

MindlancePleasanton, CA, US
Full-time
Development Quality Engineer will serve as a technical representative providing design quality expertise to a product development team. Responsible for maintaining a strong collaborative partnership...Show moreLast updated: 17 hours ago
  • Promoted
Senior FPGA Verification Engineer

Senior FPGA Verification Engineer

Planet Labs PBCSan Francisco, CA, United States
Full-time
We believe in using space to help life on Earth.Planet designs, builds, and operates the largest constellation of imaging satellites in history. This constellation delivers an unprecedented dataset ...Show moreLast updated: 30+ days ago
  • Promoted
Design Verification Engineer

Design Verification Engineer

OpenAISan Francisco, CA, United States
Full-time
OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-na...Show moreLast updated: 8 days ago
  • Promoted
Design Verification Engineer

Design Verification Engineer

EDA CAREERS, (Technology Futures Inc).San Francisco, California, US
Full-time
Get AI-powered advice on this job and more exclusive features.Interested in this role You can find all the relevant information in the description below. Direct message the job poster from EDA CAREE...Show moreLast updated: 1 day ago