Senior VLSI Physical Verification Engineer

A company is looking for a Senior Physical Verification Engineer, VLSI Implementation.

Key Responsibilities

Develop physical verification methodologies for graphics processors and SOCs

Conduct physical verification and debugging of reticle-sized chips, coordinating with the PNR team for SOL tape-out

Enhance physical verification flows for new technologies, focusing on automation and expert workflows

Required Qualifications

BS / MS in Electrical Engineering or related field (or equivalent experience)

Minimum 4+ years of physical implementation experience with 2+ years in physical verification

Familiarity with chip design aspects including Floor planning, Clock and Power distribution, Place and Route

Strong knowledge of Physical Verification debug and experience with DRC / LVS / Antenna issues

Proficiency in scripting and programming skills in Python / Perl or related automation languages