Talent.com
Custom Layout Engineer in Cupertino
Custom Layout Engineer in CupertinoEnergy Jobline ZR • Cupertino, CA, United States
Custom Layout Engineer in Cupertino

Custom Layout Engineer in Cupertino

Energy Jobline ZR • Cupertino, CA, United States
2 days ago
Job type
  • Full-time
Job description

Energy Jobline is the largest and fastest growing global Energy Job Board and Energy Hub. We have an audience reach of over 7 million energy professionals, 400,000+ monthly advertised global energy and engineering jobs, and work with the leading energy companies worldwide.

We focus on the Oil & Gas, Renewables, Engineering, Power, and Nuclear markets as well as emerging technologies in EV, Battery, and Fusion. We are committed to ensuring that we offer the most exciting career opportunities from around the world for our jobseekers.

Job DescriptionJob Description

Custom Layout Engineer

Location : Cupertino, CA - Onsite

Pay Rate : $65–$74.62 / hr

Duration : 12-month assignment

Hours : 40 hours / week

Summary

Our client’s Analog / Mixed-Signal Design Team is seeking a Custom Layout Engineer to deliver world-class, high-performance layouts for complex System-on-Chip (SoC) designs. This role is critical in ensuring the precision, quality, and reliability of analog and mixed-signal circuits that power cutting-edge technologies.

The ideal candidate is a highly skilled layout designer with deep expertise in sub-micron CMOS technologies, strong collaboration skills, and a meticulous approach to design integrity and verification.

Key Responsibilities

  • Perform full-custom mask layout of analog and mixed-signal circuits for integration into advanced SoCs.
  • Collaborate closely with circuit designers and layout leads to understand performance requirements and implement layouts that meet strict specifications for power, noise, and area efficiency.
  • Develop detailed floorplans, execute layout from schematic, and ensure adherence to all design and DFM best practices.
  • Review and interpret DRC, LVS, and ERC reports using tools such as CALIBRE to ensure design correctness and compliance.
  • Identify, analyze, and mitigate potential risks related to IR drop, RC delay, electromigration, self-heating, and cross-capacitance.
  • Communicate proactively with design and verification teams to address layout challenges and ensure project schedules are met.
  • Partner with cross-functional teams to assess and refine layout trade-offs, optimizing design for performance and manufacturability.
  • Maintain documentation, version control, and process consistency across all layout projects.
  • Contribute to continuous improvement initiatives by identifying opportunities to enhance layout methodologies and CAD tool usage.

What You Bring

  • Bachelor’s degree or foreign equivalent in Electrical Engineering, Electronic Engineering, or related field, and 6+ years of relevant experience;
  • or Master’s degree with 3+ years of progressive, post-baccalaureate experience.
  • Proven track record in layout design of analog and mixed-signal circuits using sub-micron CMOS and FinFET technologies.
  • Strong understanding of layout principles for tight matching, low noise, and low power analog blocks , including resistors, capacitors, pad IOs, and ESD structures.
  • Experience with IR drop , RC delay , electromigration , self-heating , and cross-capacitance analysis.
  • Proficiency in interpreting and resolving CALIBRE DRC, ERC, and LVS reports.
  • Expertise in analog and DFM best practices , with a solid foundation in analog / mixed-signal layout design methodologies.
  • Excellent communication and collaboration skills with the ability to work effectively across multidisciplinary teams.
  • Highly organized with the ability to manage multiple priorities and deliver under tight deadlines.
  • Bonus Points

  • 5+ years of experience in analog / mixed-signal layout design with a focus on deep sub-micron CMOS and at least 2+ years in FinFET technologies.
  • Familiarity with CAD tools such as Virtuoso, Innovus, and Calibre.
  • Programming knowledge in SKILL, Perl, and / or Python for layout automation and productivity enhancement.
  • Concentration or background in Mixed-Signal and RF Integrated Circuits .
  • Strong analytical mindset and attention to detail, with a drive for continuous process and performance improvement.
  • TCWGlobal is an equal opportunity employer. We do not discriminate based on , , , , religious belief, or .

    It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

    If you are interested in applying for this job please press the Apply Button and follow the application process. Energy Jobline wishes you the very best of luck in your next career move.

    Create a job alert for this search

    Engineer • Cupertino, CA, United States