Physical Design Engineer

Benefits :

401(k)

401(k) matching

Job Title : Physical Design Engineer

Location : Milpitas, CA

Primary Responsibilities :

Primary Responsibilities :

• Pre-layout STA to ascertain feasibility, timing constraint validation and feedback tocustomers and design teams
• Chip / Block Level Floorplanning and pin assignment
• Review top-level / block-level clock specifications for completeness and feasibility
• Handle all the Physical design tasks (Placement, Timing Optimization, Clock TreeSynthesis, Routing)
• Perform sign-off tasks (RC Extraction, Static Timing Analysis, IR drop analysis andPhysical Verification)
• Presentations and Customer Interaction in customer meetings

Necessary Qualifications :

• BSEE, with 9+ years of experience or equivalent experience. MSEE preferred.
• Experience in ASIC Physical Design; Experience in an SoC product developmentorganization with tapeouts at 28nm / 16nm design nodes.
• Hands-on Experience with implementation EDA tools like ICC2 / Innovus.
• Scripting (Perl / Tcl / Python) is required.
• Good understanding of ASIC frontend design.
• Experience in both Flat and Hierarchical layouts.
• Strong problem-solving skills and ability to analyze and resolve physical design issuesrelated to library, timing constraints or CAD tools is required.
• Experience with power analysis and IR-drop tools (primepower / Redhawk) and StaticTiming Analysis (Primetime).
• Experience with Physical Verification and fix PV errors in layout.
• Expert handling of Verilog HDL based Netlists, Physical design libraries.
• Team player with good interpersonal and communication skills; ability to explainprocesses and answer customer questions during meetings.

Compensación : $190,000.00 - $200,000.00 per year

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• Founded in 1995
• Privately Owned Corporation
• Managing Partner Business Model
• Headquartered in New Jersey
• US Based Engineers Only
• Collaborative Team Approach
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