A company is looking for a Floating Point Formal Verification Engineer.
Key Responsibilities
Perform formal verification of high-speed floating-point designs, including data-path, assertion, and property verification
Develop environments, infrastructure, and test plans to enhance verification efficiency
Drive project deliverables with cross-discipline teams and mentor other engineers
Required Qualifications
Prior industry experience with formal verification techniques of microprocessors / ASIC designs
Experience with industry-standard tools such as DPV, Jasper Gold, and FPV
Proficiency in programming languages including C / C++, Perl, and Ruby
Expertise in Verilog HDL and System Verilog
Bachelor's or Master's degree in Electrical Engineering or Computer Science preferred
Verification Engineer • Glendale, Arizona, United States