Verification Engineer - Intermediate (US) - AMDJP00004426

Position Title : Verification Engineer

Location : Longmont, CO

Clearance Requirements : None

Position Status : Contract

Pay Rate : $60 / hr - $65 / hr on W2

Position Description :

We are seeking a Verification Engineer to join a high-performing PCIe development and productization team. In this role, you will be responsible for verifying IP blocks, developing test environments, and ensuring the functionality of designs within the broader system. You'll collaborate with design and verification engineers to drive high-quality verification strategies using modern methodologies such as UVM .

A majority of your work will focus on PCIe device testing including DMA, CXL, IDE, VIP models, and traffic generators / checkers. This is a hands-on role that requires strong technical expertise, problem-solving skills, and the ability to adapt to evolving verification methodologies.

Key Responsibilities :

• Perform functional verification of IP blocks using Verilog and SystemVerilog.
• Develop and enhance test environments with directed and constrained-random tests.
• Apply UVM methodologies and leverage industry-standard verification infrastructure.
• Debug and resolve issues efficiently using tools like ModelSim / VCS.
• Collaborate with cross-functional teams to ensure comprehensive verification coverage.
• Work on PCIe verification, including device testing, traffic models, and checkers.

Required Skills / Education :

Nice-to-Have Skills :

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